IBM runs Quantum algorithm on AMD chips

IBM has made a significant advancement in quantum computing by demonstrating that its error correction algorithm can operate on conventional chips from Advanced Micro Devices (AMD). This breakthrough, announced on October 24, 2025, marks a pivotal step toward making quantum computing more practical and commercially viable.

Quantum computers utilize qubits to solve complex problems that are beyond the capabilities of classical computers. However, qubits are highly susceptible to errors, which can quickly overwhelm the computational work of a quantum chip. To address this, IBM developed an algorithm capable of correcting such errors in real time. In a forthcoming research paper, IBM reveals that this algorithm can effectively run on AMD's field-programmable gate array (FPGA) chips, which are widely available and cost-effective.

Jay Gambetta, IBM's research director, emphasized that this achievement not only proves the algorithm's effectiveness in real-world conditions but also highlights its compatibility with readily available and reasonably priced hardware. The algorithm performs ten times faster than necessary, underscoring its efficiency and practicality.

This development is part of IBM's broader plan to build a quantum computer named Starling by 2029, with the algorithmic advancement completed a year ahead of schedule. The Starling project aims to create a large-scale, fault-tolerant quantum computer capable of running quantum circuits comprising 100 million quantum gates on 200 logical qubits.

The announcement has had a positive impact on AMD's stock, which surged over 6% following the news, reflecting investor confidence in the growing intersection of classical and quantum computing technologies.

In summary, IBM's successful implementation of its quantum error correction algorithm on AMD's conventional chips represents a significant milestone in the journey toward practical and scalable quantum computing. This achievement not only advances IBM's roadmap but also demonstrates the potential for integrating quantum computing with existing hardware infrastructure.